收藏本站
Chapter 13: Troubleshooting
13–5
Troubleshooting Issues
alt_dspbuilder_setup_megacore r
The Synthesis Flow Does Not Run Properly
The DSP Builder automated flows allow you to control your entire synthesis and
compilation flow in the MATLAB or Simulink environment using the Signal
Compiler block. With the automated flow, the Signal Compiler block outputs VHDL
files and Tcl scripts and then automatically begins synthesis and compilation in the
Quartus II software.
If the Quartus II software does not run automatically, check the software paths and if
necessary, change the system path settings.
Check the Software Paths
If you have multiple versions of the same software product on your PC (for example,
Quartus II Web Edition and a full version of the Quartus II software), your registry
DSP Development Board Troubleshooting
If Signal Compiler does not configure the device on the DSP development board,
check the following points:
■
■
■
Ensure that you set up and connect the board to your PC and you install any
necessary drivers.
When the board powers up, the CONF_DONE LED illuminates. The CONF_DONE LED
turns off and then on when configuration completes successfully. If you do not
observe the LED operating in this way, configuration is unsuccessful.
You can configure the DSP board manually with an SRAM Object File (. sof ), a
ByteBlasterMV, ByteBlaster II, ByteBlaster, or USB-Blaster download cable, and the
Quartus II Programmer in JTAG mode. Signal Compiler generates the SRAM
object file (. sof) file in your working directory.
SignalTap II Analysis Appears to Hang
The SignalTap II logic analyzer should terminate successfully after it meets all trigger
conditions. However, if it does not meet one or more of the trigger conditions, the
SignalTap II analyzer does not terminate and the JTAG node remains locked.
You can either disconnect and reconnect the USB cable, or switch off the board and
switch it on again. You must program the board again if you power it off.
Error if Output Block Connected to an Altera Synthesis Block
An Output block maps to output ports in VHDL and marks the edge of the generated
system. You should normally use these blocks to connect simulation blocks (Simulink
blocks) for your testbench. If you want to use DSP Builder blocks outside your
synthesizable system (such as for test bench generation or verification) put
Non-synthesizable Input and Non-synthesizable Output blocks around them.
November 2013
Altera Corporation
DSP Builder Handbook
Volume 2: DSP Builder Standard Blockset
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*
相关PDF资料
IR11662SPBF IC CNTROL SMART RECTIFIER 8-SOIC
IR1166STRPBF IC MOSFET DRIVER N-CH 200V 8SOIC
IR11672ASPBF IC MOSFET DRIVER 200V 8-SOIC
IR1167ASTRPBF IC SMART SECONDARY DRIVER 8-SOIC
IR11682STRPBF IC MOSFET DRIVER DUAL 200V 8SOIC
IR1168SPBF IC MOSFET DRIVER DUAL 200V 8SOIC
IR1176STR IC DRIVER RECT SYNC 5V 4A 20SSOP
IR2010SPBF IC DRIVER HIGH/LOW SIDE 16SOIC
相关代理商/技术参数
IP-TRIETHERNET 功能描述:开发软件 Triple Spd Ethernet MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IP-TRIETHERNETF 功能描述:开发软件 3x Spd Ethernet MAC MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IPTV-OPTION-INS970 制造商:3M Electronic Products Division 功能描述:IPTV OPTION FOR INS970
IPU039N03L G 功能描述:MOSFET N-CH 30V 50A 3.9mOhms RoHS:否 制造商:STMicroelectronics 晶体管极性:N-Channel 汲极/源极击穿电压:650 V 闸/源击穿电压:25 V 漏极连续电流:130 A 电阻汲极/源极 RDS（导通）:0.014 Ohms 配置:Single 最大工作温度: 安装风格:Through Hole 封装 / 箱体:Max247 封装:Tube
IPU039N03LG 制造商:INFINEON 制造商全称:Infineon Technologies AG 功能描述:OptiMOS?3 Power-Transistor Features Fast switching MOSFET for SMPS
IPU039N03LGXK 制造商:Infineon Technologies AG 功能描述:Trans MOSFET N-CH 30V 50A 3-Pin(3+Tab) TO-251
IPU04N03LA 功能描述:MOSFET N-CH 25V 50A IPAK RoHS:否 类别:分离式半导体产品 >> FET - 单 系列:OptiMOS™ 标准包装:1,000 系列:MESH OVERLAY™ FET 型:MOSFET N 通道，金属氧化物 FET 特点:逻辑电平门 漏极至源极电压(Vdss):200V 电流 - 连续漏极(Id) @ 25° C:18A 开态Rds（最大）@ Id, Vgs @ 25° C:180 毫欧 @ 9A，10V Id 时的 Vgs(th)（最大）:4V @ 250µA 闸电荷(Qg) @ Vgs:72nC @ 10V 输入电容 (Ciss) @ Vds:1560pF @ 25V 功率 - 最大:40W 安装类型:通孔 封装/外壳:TO-220-3 整包 供应商设备封装:TO-220FP 包装:管件
IPU04N03LA G 功能描述:MOSFET N-CH 25V 50A IPAK RoHS:是 类别:分离式半导体产品 >> FET - 单 系列:OptiMOS™ 标准包装:1,000 系列:MESH OVERLAY™ FET 型:MOSFET N 通道，金属氧化物 FET 特点:逻辑电平门 漏极至源极电压(Vdss):200V 电流 - 连续漏极(Id) @ 25° C:18A 开态Rds（最大）@ Id, Vgs @ 25° C:180 毫欧 @ 9A，10V Id 时的 Vgs(th)（最大）:4V @ 250µA 闸电荷(Qg) @ Vgs:72nC @ 10V 输入电容 (Ciss) @ Vds:1560pF @ 25V 功率 - 最大:40W 安装类型:通孔 封装/外壳:TO-220-3 整包 供应商设备封装:TO-220FP 包装:管件